Our client, a leading investment bank, is looking for a strong FPGA developer to join their Quantitative Prime Services Equities team to build their industry-leading, ultra-low-latency Equities trading systems.

Responsibilities:
– Participate in the whole SDLC from architecture design, development, and testing, to implementation of the ultra-low-latency Direct Market Access (DMA) trading platform.
– Supporting analysis, testing, and operations teams as required
– Participating in code reviews and mentoring junior members

Requirements:
– Industrial experience with FPGAs design and verification in SystemVerilog, Verilog, or VHDL.
– Embedded C++ and above programming skills with strong knowledge of STL, Boosts and GTest
– Understanding of higher-level Computer Science concepts, such as data structures and algorithms
– Experience in working in Investment banking is preferred
– Knowledge of Java, computer networks, computer architecture, Linux and Agile is a plus

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